Simple stepping an ATmega with a FPGA
21 Apr 2018As continuation of the post about the internals of the clock of an ATMega, I decided to test the possibilities of simulating a clock using a FPGA, in particular using my loyal mojo development board.
As continuation of the post about the internals of the clock of an ATMega, I decided to test the possibilities of simulating a clock using a FPGA, in particular using my loyal mojo development board.
With this post I want to accomplish a few objectives:
As any computing device based on transistors and flip-flop, a microcontroller needs a clock to give the “rythm” for the cpu and peripherics. In particular for the ATMega328p the clock distribution is the following
Since last year I have an Anet A8, a 3d printer received from China as a kit and that I use as you can expect to print 3d models and experiment with this technology.