Implementing Text mode for a VGA controller in Verilog

After having written about implementing a VGA controller in Verilog I wanted to improve it with a new functionality: the Text mode.

Simple stepping an ATmega with a FPGA

As continuation of the post about the internals of the clock of an ATMega, I decided to test the possibilities of simulating a clock using a FPGA, in particular using my loyal mojo development board.

Resurrect an old vulnerability: CVE-2014-4699

With this post I want to accomplish a few objectives:

Studying ATMega's clock

As any computing device based on transistors and flip-flop, a microcontroller needs a clock to give the “rythm” for the cpu and peripherics. In particular for the ATMega328p the clock distribution is the following

Getting started to reverse AVR code

Registers